TDA9112A View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'TDA9112A' PDF : 60 Pages View PDF
6.8 DC/DC controller section
TDA9112A
Symbol
RB+FB
AOLG
fUGBW
IRI
IBComp
ABISense
VThrBIsCurr
IBISense
tBOn
IBOut
VBOSat
VBReg
tBTrigDel /TH
Table 5. DC/DC controller section (VCC = 12V, Tamb = 25°C)
Parameter
Test Conditions
Ext. resistance applied between
BComp output and BRegIn input
Open loop gain of error amplifier on
BRegIn input
Low frequency(19)
Unity gain bandwidth of error amplifier (19)
on BRegIn input
Bias current delivered by BRegIn
Output current capability of BComp out- BOut enabled
put.
BOut disabled(55)
Voltage gain on BISense input
Threshold voltage on BISense input
corresponding to current limitation
ThrBlsense = 0
ThrBlsense = 1
Bias current delivered by BISense
Conduction time of the power transistor
Output current capability of BOut output
Saturation voltage of the internal output
transistor on BOut
IBOut=10mA
Regulation reference for BRegIn volt-
age(56)
VRefO=8V
BREF (Sad03h):
x0000000b
x1000000b
x1111111b
Delay of BOut “Off-to-On” edge after BOutPh = 0 and BO-
middle of flyback pulse (57)
HEdge = 0
Value
Units
Min. Typ. Max.
5
kΩ
100
dB
6
-0.2
-0.5
0.5
3
TBD 2.1
TBD 1.2
-1
0
0.25
MHz
µA
2.0 mA
mA
V
µA
TH - 300ns
10 mA
V
3.8
V
4.9
V
6.0
V
16
%
Note 55: A current sink is provided by the BComp output while BOut is disabled.
Note 56: Internal reference related to VRefO. The same values to be found on pin BRegIn, while regulation loop is
stabilized.
Note 57: Only applies to configuration specified in "Test conditions" column, i.e. synchronization of BOut “Off-to-On”
edge with horizontal fly-back signal. Refer to chapter "DC/DC controller" for more details.
19/60
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