TDA9964 View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
'TDA9964' PDF : 24 Pages View PDF
Philips Semiconductors
12-bit, 3.0 V, 30 Msps analog-to-digital
interface for CCD cameras
Objective specification
TDA9964
Table 1 Serial interface programming
ADDRESS BITS
A3 A2 A1 A0
0000
0001
0010
0011
0100
1111
other addresses
DATA BITS D9 TO D0
PGA gain control (SD7 to SD0)
DAC OFDOUT output control (SD7 to SD0)
ADC clamp reference control (SD6 to SD0); from code 0 to 127
control pulses (pins SHP, SHD, CLPDM, CLPOB, BLK and CLK) polarity settings;
SD2, SD6, SD7 and SD9 should be set to logic 1; for SD6 and SD7 see Tables 3 4, 5, and 6
SD7 = 0 by default; SD7 = 1 PGA gain up to 36 dB but noise and clamp behaviour are not
guaranteed
initialization (SD8 = 1; SD11 to SD9 = 0 and SD7 to SD0 = 0)
test modes
Table 2 Polarity settings
SYMBOL
SHP and SHD
CLK
CLPDM
CLPOB
BLK
VSYNC
PIN
45 and 46
47
48
44
43
20
SERIAL CONTROL BIT
SD4
SD5
SD0
SD1
SD3
SD8
ACTIVE EDGE OR LEVEL
1 = HIGH; 0 = LOW
1 = rising; 0 = falling
1 = HIGH; 0 = LOW
1 = HIGH; 0 = LOW
1 = HIGH; 0 = LOW
0 = rising; 1 = falling
Table 3 Standby control using pin STDBY
BIT SD7 OF
REGISTER 0011
1
0
STDBY ADC DIGITAL OUTPUTS D11 TO D0
1
last logic state
0
active
1
active
0
test logic state
ICCA + ICCO + ICCD (typ.)
1.5 mA
72 mA
72 mA
1.5 mA
Table 4 Output enable selection using output enable pin (OE)
BIT SD6 OF
REGISTER 0011
OE
1
0
1
0
0
1
ADC DIGITAL OUTPUTS D11 TO D0
active, binary
high impedance
high impedance
active binary
2000 May 02
14
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