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TQ8032 View Datasheet(PDF) - TriQuint Semiconductor

Part Name
Description
MFG CO.
'TQ8032' PDF : 8 Pages View PDF
1 2 3 4 5 6 7 8
TQ8032
Figure 1. Architecture
. DATA IN 0
.
.
(I0)
.
.
.
Input
Buffers
.
.
.
.
.
.
DATA IN 15
(I15)
. DATA IN 16
.
.
(I16)
.
.
.
Input
Buffers
.
.
.
.
.
.
DATA IN 31
(I31)
32 X 1-BIT
MULTIPLEXER
32 X 1-BIT
MULTIPLEXER
CONFIGURE
RESET
LOAD
OUTPUT
5
5:32
DECODE
SELECT ADDRESS
(OA0:4)
5
Configuration
Register
Program Register
5 INPUT ADDRESS
(IA0:4)
.
.
Output
Buf.fers
.
DATA
OUT 31
(O31)
DATA
OUT 0
(O0)
Table 2. Pin Descriptions
Signal
I0 to I31,
NI0 to NI31
O0 to O31,
NO0 to NO31
IA0:4
Name/Level
Data input true and complement.
Differential ECL
Data output true and complement.
Differential ECL
Input address. CMOS/TTL
OA0:4
CMOS/TTL
Output select address.
Description
Differential data input ports.
Differential data output ports.
Input port selection address that is written into the selected output port
program latches (OA0:4).
IA4 IA3 IA2 IA1 IA0 Input port
00000
0
00001
1
00010
2
:::::
:
11111
31
Output port selection address. Selects the output port program latches to
which the input port selection address (IA0:4) is written.
OA4 OA3 OA2 OA1 OA0
00000
00001
00010
:::::
11111
Output port
0
1
2
:
31
2
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