TSM007 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'TSM007' PDF : 12 Pages View PDF
Functional Description
TSM007
4 Functional Description
TSM007: PWM Controller IC
Internal UVLO function
The Under Voltage Lock Out function disables the
whole device when supply voltage is lower than
the threshold.
Vref block
The Vref block provides an internal 5V reference
voltage to the IC. An internal Vref status signal is
active when Vref is lower than 4.7V and is used to
drive the output driver low when Vref is not valid.
Startup latch
The startup latch is set when the IC exits from
standby mode or UVLO state. It is reset when the
CT capacitor is discharged for the first time.
Vref 1.4V_3.0V
Comp_osc
400µA
CT
Vin
CT
725µA
1mA
Comp
VF
VF
Cs Latch
S !Q
RQ
CS
2R
Comp_Cs
R 1V
Vcc
UVLO
Vref_Status
Vref
Vref 1.4V_3.0V
Comp_osc
400µA
CT
CT
1mA
Startup Latch
S !Q
RQ
Out
Out
Current sense input
A voltage proportional to the transformer primary
winding current is applied to the CS pin. The
control IC uses this information to perform current
mode control. The PWM function will be stopped if
the CS pin voltage is greater than 1.0V.
Out
Out
Oscillator
A capacitor from the CT pin to GND sets the
oscillating frequency.
VCT
Ici=400µA
3V
1.4V
Icd=600µA
Tc
Vref
400µA
CT
Ici
1mA
CT
Td
Vref
400µA
CT
Icd
1mA
CT
T = Tc+Td
T = CT∆Vct/Ici + CT∆Vct/Icd
Let’s assume F = 1/T =100KHz
==> CT = (IcixIcd) / (Fx∆Vct(Ici+Icd))
==> CT = 1.5nF
5/12
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