CHAPTER 1 GENERAL
Table 1-7. Functional Outline of µPD78083 Subseries
Part Number
Item
µPD78081
µPD78082
µPD78P083
Internal ROM
memory
Mask ROM
8K bytes
16K bytes
PROM
24K bytesNote 1
High-speed RAM 256 bytes
384 bytes
512 bytesNote 1
Memory space
64K bytes
General-purpose register 8 bits × 8 × 4 banks
Minimum instruction
execution time
0.4 µs/0.8 µs/1.6 µs/3.2 µs/6.4 µs/12.8 µs
(with main system clock of 5.0 MHz)
Instruction set
• 16-bit operation
• Multiplication/division (8 bits × 8 bits, 16 bits ÷ 8 bits)
• Bit manipulation (set, reset, test, Boolean operation)
• BCD adjustment, etc.
I/O port
• Total
: 33
• CMOS input : 1
• CMOS I/O : 32
A/D converter
8-bit resolution × 8 channels
Serial interface
3-wire serial I/O/UART mode selectable: 1 channel
Timer
• 8-bit timer/event counter : 2 channels
• Watchdog timer
: 1 channel
Timer output
2 (8-bit PWM output)
Clock output
19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz, 2.5 MHz, 5.0 MHz
(with main system clock of 5.0 MHz)
Buzzer output
1.2 kHz, 2.4 kHz, 4.9 kHz, 9.8 kHz (with main system clock of 5.0 MHz)
Vectored Maskable
Internal: 8, external: 3
interrupt Non-maskable Internal: 1
source Software
Supply voltage
1
VDD = 1.8 to 5.5 VNote 2
Package
• 42-pin plastic shrink DIP (600 mil)
• 42-pin ceramic shrink DIP (with window) (600 mil) (µPD78P083 only)
• 44-pin plastic QFP (10 × 10 mm)
Notes 1. The capacities of the internal PROM and internal-high-speed RAM can be changed by using a memory
size select register. (IMS)
2. The supply voltage (VDD) of the µPD78081(A2) is 4.5 to 5.5 V.
19