UPD78P058F View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
MFG CO.
'UPD78P058F' PDF : 415 Pages View PDF
CHAPTER 1 GENERAL
TO0/P30
TI00/INTP0/P00
TI01/INTP1/P01
TO1/P31
TI1/P33
TO2/P32
TI2/P34
SI0/SB0/P25
SO0/SB1/P26
SCK0/P27
SI1/P20
SO1/P21
SCK1/P22
STB/P23
BUSY/P24
SI2/RXD/P70
SO2/TXD/P71
SCK2/ASCK/P72
ANI0/P10-
ANI7/P17
AVDD
AVSS
AVREF0
ANO0/P130,
ANO1/P131
AVSS
AVREF1
INTP0/P00-
INTP6/P06
BUZ/P36
PCL/P35
Figure 1-1. Block Diagram of µPD78054 Subseries
16-bit TIMER/
EVENT COUNTER
8-bit TIMER/EVENT
COUNTER 1
8-bit TIMER/EVENT
COUNTER 2
WATCHDOG TIMER
WATCH TIMER
SERIAL
INTERFACE 0
SERIAL
INTERFACE 1
78K/0
CPU CORE
ROM
PORT0
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
SERIAL
INTERFACE 2
A/D CONVERTER
RAM
PORT12
PORT13
REAL-TIME
OUTPUT PORT
D/A CONVERTER
INTERRUPT
CONTROL
BUZZER OUTPUT
CLOCK OUTPUT
CONTROL
VDD VSS IC
(VPP)
EXTERNAL
ACCESS
SYSTEM
CONTROL
Remarks 1. The internal ROM and RAM capacities differ depending on the model.
2. ( ): µPD78P054, 78P058
P00
P01-P06
P07
P10-P17
P20-P27
P30-P37
P40-P47
P50-P57
P60-P67
P70-P72
P120-P127
P130, P131
RTP0/P120-
RTP7/P127
AD0/P40-
AD7/P47
A8/P50-
A15/P57
RD/P64
WR/P65
WAIT/P66
ASTB/P67
RESET
X1
X2
XT1/P07
XT2
4
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