UPD78P4916GF-3BA View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
MFG CO.
'UPD78P4916GF-3BA' PDF : 56 Pages View PDF
µPD78P4916
Figure 2-1. Pin I/O Circuit Diagrams (1/2)
Type 2
Type 5-A
IN
Schmitt triggered input with hysteresis characteristics.
Type 2-A
VDD
P-ch
pullup
enable
IN
Schmitt triggered input with hysteresis characteristics.
Type 3
data
VDD
P-ch
N-ch
OUT
Type 4
data
output
disable
VDD
P-ch
N-ch
OUT
Push-pull output that can also set the output to the
high-impedance state
(both P-ch and N-ch transistors are turned off.)
pullup
enable
data
output
disable
input
enable
Type 7
IN
P-ch
N-ch
Type 8-A
pullup
enable
data
output
disable
VDD
P-ch
VDD
P-ch
N-ch
IN/
OUT
Comparator
VREF (Threshold voltage)
VDD
P-ch
VDD
P-ch
N-ch
IN/
OUT
18
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