PARAMETER
SYM
Cable Impedance and Timing
Cable Impedance (Full
ZO
Speed)
Cable Delay (One Way) TCBL
CONDITIONS
(NOTE 1, 2, 3)
(45 Ω +/- 15%)
MIN TYP
38.75
MAX
51.75
30
Note 1: All voltages are measured from the local ground potential, unless otherwise specified.
Note 2: All timing use a capacitive load (CL) to ground of 50pF, unless otherwise specified.
Note 3: Full speed timings have a 1.5KΩ pull-up to 2.8 V on the D+ data line.
Note 4: Measured from 10% to 90% of the data signals.
Note 5: The rising and falling edges should be smoothly transiting (monotonic).
Note 6: Timing differences between the differential data signals.
Note 7: Measured at crossover point of differential data signals.
Note 8: These are relative to the 14.318 MHz crystal.
UNIT
Ω
ns
SMSC DS – USB97CFDC2-01
Page 23
DATASHEET
Rev. 02-27-07