VIS
Preliminary
VG4616321B/VG4616322B
262,144x32x2-Bit
CMOS Synchronous Graphic RAM
Figure 10.3 Random Column Write (Page within same Bank)
(Burst Length = 4, CAS Latency = 3)
CLK
CKE
CS
RAS
CAS
WE
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
t
CK3
DSF
BS
A9
RBw
RBz
A0 ~ A8
RBw
CBw
CBx
CBy
RBz
CBz
DQM
DQ
Hi-Z
DBw0 DBw1 DBw2 DBw3 DBx0 DBx1 DBy0 DBy1 DBy2 DBy3
DBz0 DBz1 DBz2
Activate
Command
Bank B
Write
Command
Bank B
Write
Write
Command Command
Bank B Bank B
Precharge
Command
Bank B
Activate
Command
Bank B
Write
Command
Bank B
Document:1G5-0145
Rev.1
Page 44