VN16117L1 View Datasheet(PDF) - Vaishali Semiconductor
Part Name
Description
MFG CO.
'VN16117L1' PDF : 15 Pages View PDF
VN16117
Figure 1. Functional Block Diagram
EWRAP
TX<9:0>
10
10
Input Data Latch
Shift Registers
TX_CLK
TX PLL Clock
Generator
RX_CLK<1>
RX CLK<0>
53.125 MHz
÷2
53.125 MHz
RX<9:0>
10
Output Latch
106.25 MHz
RX PLL Clock
Recovery
EN_CDET
COM_DET
10
FRAME
ENABLE
10
Shift
Registers
Preliminary
DOUT+
DOUT-
DIN+
DIN-
2001-08-09
Page 2
MDSN-0002-02
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