VISION VV6801/5801 PRELIMINARY CUSTOMER DATASHEET Rev 1.1
Pin
73
67
68
69
70
60
66
59
58
57
63
64
62
61
22
23
27
26
Name Type
Function/Comment
CDSR
ID↓ Correlated Double Sampling: Control input to allow the row of pix-
els currently being read to be reset without advancing the reset
VSR.
VCLRB ID↑ Clear Reset and Read VSR’s.
VSETB ID↑ Preset the Reset VSR to all ones. The Read VSR is not preset.
FI
ID
Field Integrate: Resets VSR. High duration sets exposure time.
FR
ID
Field Read: Reads VSR. Starts field read out.
PCK
HCLRB
y LS
r EC
a COLsam
in DIN
DOUT
DLAT
lim DCK
Vdactop
e Vdac3/4
r DNC
PVdac
HORIZONTAL SHIFT REGISTER (HSR)
ID
Pixel clock
ID↑ Clear Horizontal Shift Register
ID
Line Start: Starts horizontal scan/pixel output.
ID
ODD/EVEN Column Select.
ID
Sample the Column Source Follower Inputs (pixel row).
SERIAL DATA INTERFACE (SDI)
ID↓ Serial Data Input
OD Serial Data Output
ID↓ Latch Serial Data into Control Register
ID↓ Serial Data Clock Must be generated by host.
5-BIT RESISTIVE LADDER DAC
IA
Voltage reference for the top of the resistive ladder
OA Three-Quarter-point of the resistive ladder (Unbuffered)
Do not connect
OA DAC Output Voltage (Unbuffered)
VISION VV6801/5801 PRELIMINARY CUSTOMER DATASHEET Rev 1.1
Key:
OA Analogue output pad
IA
Analogue input pad
OD Digital output pad
ID
ID↑
OD↓
Digital input
Digital input with internal pull-up
Digital output with internal pull-down
9.2 Package dimensions
0.51 TYP
1.0 TYP
‘TOP’
Optical Centre
Standard 84 Pin LCC
ry 0.42
ina 0.51
0.864 Min.
Glass Lid
Sensor
0.55
Pin 1
2.16
lim Pin 11
1.016 PITCH TYP
Viewed from below
The optical array is centred within the
package to a tolerance of +/- 0.2 mm, and
rotated no more than +/- 0.5o
Tolerances on package dimensions +/-0.2
All dimensions in millimetres
PreFigure 9.2 : 84 LCC Package details
cd24082b.fm
09/09/98: PRELIMINARY
41
cd24082b.fm
09/09/98: PRELIMINARY
42