Serial Control Bus
4 Serial Control Bus
VV6501
4.1 General description
The 2-wire I2C serial interface bus is used to read and write the sensor control registers.
Some status registers are read-only.
The main features of the serial interface include:
q Variable length read/write messages.
q Indexed addressing of information source or destination within the sensor.
q Automatic update of the index after a read or write message.
q Message abort with negative acknowledge from the master.
q Byte oriented messages.
4.2 Serial communication protocol
The co-processor must perform the role of communication ‘master’ and the sensor acts as a ‘slave’.
The communication from host to sensor takes the form of 8-bit data with a maximum serial clock
frequency of 100 kHz. Since the serial clock is generated by the bus master it determines the data
transfer rate. Data transfer protocol on the bus is illustrated in Figure 22.
Figure 22: Serial Interface data transfer protocol
Start condition
Acknowledge
SDA
MSB
LSB
SCL
S
12 34 5 6 7 8
Address or data byte
P
A
Stop condition
4.2.1
Data format
Information is packed in 8-bit packets (bytes) always followed by an acknowledge bit. The internal
data is produced by sampling sda at a rising edge of scl. The external data must be stable during
the high period of scl. Exceptions to this are start (S) or stop (P) conditions when sda falls or rises
respectively, while scl is high.
A message contains at least two bytes preceded by a start condition and followed by either a stop or
repeated start, (Sr) followed by another message.
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