VV6501
I2C Registers
[0x17] - op_format
Bit
Function
7 RESERVED
6 Re-time tri-state update.
Off / On
5 Tri-state output data bus,
FST & QCLK
Outputs Enabled / Tri-state
[4:3] RESERVED
2 Embedded SAV/EAV Escape
Sequences
On / Off
1 RESERVED
0 Data format select.
Default
0
0
0
0
Comment
Re-time new tri-state value to a frame boundary.
On power up the data bus, QCLK & FST pads
are enabled by default.
0 - Insert Embedded Control Sequences e.g
Start and End of Active Video into Output Video
data
1 - Pass-through mode. Output Video data
equals ADC data. Note: also disables FST when
SAV/EAV generation disabled.
0 - 5 wire parallel output
1 - 4 wire parallel output
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