White Electronic Designs
WED2ZLRSP01S
TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
CEx# ADV WE# BWx# OE# CKE# CK Address Accessed
H
L
X
X
X
L↑
N/A
X
H
X
X
X
L↑
N/A
L
L
H
X
L
L ↑ External Address
X
H
X
X
L
L↑
Next Address
L
L
H
X
H
L ↑ External Address
X
H
X
X
H
L↑
Next Address
L
L
L
L
X
L ↑ External Address
X
H
X
L
X
L↑
Next Address
L
L
L
H
X
L↑
N/A
X
H
X
H
X
L↑
Next Address
X
X
X
X
X
H↑
Current Address
Operation
Deselect
Continue Deselect
Begin Burst Read Cycle
Continue Burst Read Cycle
NOP/Dummy Read
Dummy Read
Begin Burst Write Cycle
Continue Burst Write Cycle
NOP/Write Abort
Write Abort
Ignore Clock
NOTES:
1. X means “Don’t Care.”
2. The rising edge of clock is symbolized by ( ↑ )
3. A continue deselect cycle can only be entered if a deselect cycle is executed first.
4. WRITE# = L means Write operation in WRITE TRUTH TABLE.
WRITE# = H means Read operation in WRITE TRUTH TABLE.
5. Operation finally depends on status of asynchronous input pins (ZZ and OE#).
6. CEx# refers to the combination of CE1#, CE2 and CE2#.
7. Applies to each of the independent arrays.
WRITE TRUTH TABLE
WE# BWa# BWb# BWc# BWd# Operation
H
X
X
X
X
Read
L
L
H
HH
Write Byte a
L
H
L
H
H
Write Byte b
L
H
H
L
H
Write Byte c
L
H
H
H
L
Write Byte d
L
L
L
L
L
Write All Bytes
L
H
H
H
H Write Abort/NOP
NOTES:
1. X means “Don’t Care.”
2. All inputs in this table must meet setup and hold time around the rising
edge of CK ( ↑ ).
3. Applies to each of the independent arrays.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
April, 2002
Rev. 0
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com