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WM8731CSEFL/R View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
'WM8731CSEFL/R' PDF : 65 Pages View PDF
WM8731 / WM8731L
Production Data
1/fs
DACLRC/
ADCLRC
LEFT CHANNEL
RIGHT CHANNEL
BCLK
DACDAT/
ADCDAT
1 BCLK
123
MSB
n-2 n-1 n
LSB
1 BCLK
123
MSB
n-2 n-1 n
LSB
Figure 27 I2S Mode
Right Justified mode is where the LSB is available on the rising edge of BCLK preceding a DACLRC
or ADCLRC transition, yet MSB is still transmitted first.
DACLRC/
ADCLRC
BCLK
1/fs
LEFT CHANNEL
RIGHT CHANNEL
DACDAT/
ADCDAT
123
MSB
n-2 n-1 n
LSB
123
MSB
n-2 n-1 n
LSB
Figure 28 Right Justified Mode
In DSP/PCM mode, the left channel MSB is available on either the 1st (mode B) or 2nd (mode A) rising
edge of BCLK (selectable by LRP) following a rising edge of LRC. Right channel data immediately
follows left channel data. Depending on word length, BCLK frequency and sample rate, there may be
unused BCLK cycles between the LSB of the right channel data and the next sample.
Figure 29 DSP/PCM Mode Audio Interface (mode A, LRP=1)
w
PD, Rev 4.9, October 2012
37
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