WM8734
Production Data
As a master mode device the WM8734 controls the sequencing of data transfer (ADCDAT, DACDAT)
and output of clocks (BCLK, ADCLRC, DACLRC) over the digital audio interface. It uses the timing
generated from either its on-board crystal or the MCLK input as the reference for the clock and data
transitions. This is illustrated in Figure 21. ADCDAT is always an output from and DACDAT is always
an input to the WM8734 independent of master or slave mode.
BCLK
ADCLRC
WM8734
CODEC
DACLRC
ADCDAT
DACDAT
DSP
ENCODER/
DECODER
Figure 21 Master Mode
As a slave device the WM8734 sequences the data transfer (ADCDAT, DACDAT) over the digital
audio interface in response to the external applied clocks (BCLK, ADCLRC, DACLRC). This is
illustrated in Figure 22.
BCLK
ADCLRC
WM8734
CODEC
DACLRC
ADCDAT
DACDAT
DSP
ENCODER/
DECODER
Figure 22 Slave Mode
Note that the WM8734 relies on controlled phase relationships between audio interface BCLK,
DACLRC and the master MCLK. To avoid any timing hazards, refer to the timing section for detailed
information.
AUDIO DATA SAMPLING RATES
The WM8734 provides for two modes of operation (normal and USB) to generate the required DAC
and ADC sampling rates. Normal and USB modes are programmed under software control according
to the table below.
In Normal mode, the user controls the sample rate by using an appropriate MCLK or crystal frequency
and the sample rate control register setting. The WM8734 can support sample rates from 8ks/s up to
96ks/s.
In USB mode, the user must use a fixed MLCK or crystal frequency of 12MHz to generate sample
rates from 8ks/s to 96ks/s. It is called USB mode since the common USB (Universal Serial Bus) clock
is at 12MHz and the WM8734 can be directly used within such systems. WM8734 can generate all
the normal audio sample rates from this one Master Clock frequency, removing the need for different
master clocks or PLL circuits.
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PD, Rev 4.4, August 2013
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