Production Data
WM8772EDS – 28 LEAD SSOP
DAC OUTPUT PHASE
The DAC Phase control word determines whether the output of each DAC is non-inverted or inverted
REGISTER ADDRESS BIT LABEL DEFAULT
0000011
8:6 PHASE
000
Bit
DAC Phase
[2:0]
0
1
DESCRIPTION
DAC
Phase
DAC1L/R 1 = invert
DAC2L/R 1 = invert
2
DAC3L/R 1 = invert
DIGITAL ZERO CROSS-DETECT
The Digital volume control also incorporates a zero cross detect circuit which detects a transition
through the zero point before updating the digital volume control with the new volume. This is
enabled by control bit DZCEN.
REGISTER ADDRESS BIT
0001001
0
DAC Control
LABEL
ZCD
DEFAULT
0
DESCRIPTION
DAC Digital Volume Zero Cross
Disable:
0: Zero cross detect enabled
1: Zero cross detect disabled
MUTE FLAG OUTPUT
The DZFM control bits allow the selection of the six DAC channel zero flag bits for output on the
MUTEB pin. A ‘1’ on MUTE indicates 1024 consecutive zero input samples to the DAC channels
selected.
REGISTER ADDRESS
0001001
Zero Flag
BIT LABEL DEFAULT
2:1 DZFM[1:0]
00
DESCRIPTION
Selects the output MUTE pin (A ‘1’
indicates 1024 consecutive zero
input samples on the DAC channels
selected.
00: All channels zero
01: Channel 1 zero
10: Channel 2 zero
11: Channel 3 zero
DAC MUTE MODES
The WM8772EDS has individual mutes for each of the three DAC channels. Setting MUTE for a
channel will apply a ‘soft’ mute to the input of the digital filters of the channel muted.
REGISTER ADDRESS BIT LABEL
0001001
5:3 DMUTE
DAC Mute
[2:0]
DEFAULT
000
DESCRIPTION
DAC Soft Mute Select
DMUTE [2:0]
000
001
010
011
100
101
110
DAC CHANNEL 1
Not MUTE
MUTE
Not MUTE
MUTE
Not MUTE
MUTE
Not MUTE
DAC CHANNEL 2
Not MUTE
Not MUTE
MUTE
MUTE
Not MUTE
Not MUTE
MUTE
DAC CHANNEL 3
Not MUTE
Not MUTE
Not MUTE
Not MUTE
MUTE
MUTE
MUTE
w
PD Rev 4.2 October 2005
33