X28C010
DATA Polling Timing Diagram(7)
ADDRESS
AN
AN
AN
CE
WE
tOEH
OE
I/O7
DIN=X
DOUT=X
tWC
Toggle Bit Timing Diagram
CE
tOES
tDW
DOUT=X
3858 FHD F09
3858 FHD F09
WE
tOEH
OE
I/O6
HIGH Z
*
*
tWC
* I/O6 beginning and ending state will vary.
Note: (7) Polling operations are by definition read cycles and are therefore subject to read cycle timings.
tOES
tDW
3858 FHD F10
15