XR16C2852 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XR16C2852' PDF : 51 Pages View PDF
XR16C2852
2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS
xr
REV. 2.1.1
FIGURE 20. RECEIVE READY & INTERRUPT TIMING [NON-FIFO MODE] FOR CHANNELS A & B
RX
Start
Bit
D0:D7
Stop
Bit
D0:D7
D0:D7
TSSR
TSSR
TSSR
1 Byte
1 Byte
1 Byte
INT
in RHR
in RHR
in RHR
TSSR
TSSR
TSSR
RXRDY#
Active
Data
Ready
TRR
Active
Data
Ready
TRR
Active
Data
Ready
TRR
IOR#
(Reading data
out of RHR)
RXNFM
FIGURE 21. TRANSMIT READY & INTERRUPT TIMING [NON-FIFO MODE] FOR CHANNELS A & B
TX
(Unloading)
IER[1]
enabled
Start
Bit
D0:D7
Stop
Bit
ISR is read
D0:D7
ISR is read
D0:D7
ISR is read
INT*
TWRI
TXRDY#
TWRI
TSRT
TSRT
TWRI
TSRT
TWT
TWT
IOW#
(Loading data
into THR)
*INT is cleared when the ISR is read or when data is loaded into the THR.
TWT
TXNonFIFO
44
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