XR68C681
Output Port
,
,
,
,1
,=
,6
,/
,@
Alternate Function(s)
RTSA: C%$ + ' 84 (% (% '( : + +'
(
RTSB: C%$ + ' * 84 (% (% '( : + +'
(
TXCA_16X Output: /5 %( '3 4
TXCA_1X Output: 5 %( '3
RXCA_1X: Output: 5 '( '3
TXCB_1X Output: * 5 %( '3 4
RXCB_1X Output: * 5 '( '3
C/T_1_RDY: .( $& + . P Note: This output is an Open-Drain output
when used as the Counter/Timer Ready Output.
RXRDY/FFULL_A Output: '( $&. # #$(' 84 (% (%
( + 5E. ::D +'(
RXRDY/FFULL_B Output: * '( $&. # #$(' 84 (% (%
( + 5E. ::D* +'(
TXRDY_A Output: %( $& #$(' (% (% ( +
5ED +'(
TXRDY_B Output: * %( $& #$(' (% (% ( +
5ED* +'(
Table 15. Listing of the Alternate Functions for the Output Port
& + '(% + (% (% %'$ & ((- ( $ ,
( + + (% -(% +%
Bit 7
OP7
J ,M@N
J 5E*
Bit 6
OP6
J ,M/N
J 5E
Bit 5
OP5
J ,M6N
J 5E.
::*
Bit 4
OP4
J ,M=N
J 5E.
::
Bit 3
Bit 2
OP3
J ,M1N
J . P
J 5*5
J 5* 5
Bit 1
Bit 0
OP2
J ,MN
J 5 /5
J 5 5
J 5 5
Table 16. Output Port Configuration Register - OPCR
Note:
OPCR only addresses the alternate functions for output port pins, OP7 - OP2. OP0 and OP1 assume their RTS roles if either
MR1n[7] = 1 or MR2n[5] = 1. Setting those mode register bits enables the RTS function. Otherwise, these two ports will only be
general purpose output ports.
G. SERIAL CHANNELS A and B
2' %( ' + '(%%
+$! %&' % '( $ %(
' % ' ($$& %' ( (-
+C'& + *0" ." ! ''3 %
% (- $ *%($% $ (
(' '( $ %( + ' '
($$&" ' '+(-$
( (% (- $%" (' %+ +
' $ $(-%('%" % % ( 3
$ %$ + ($ ('(%
=