XR82C684
Output Port
+
+
+
+4
+@
+9
Alternate Function(s)
TXCC_1X: 8 %( '6
TXCC_16X: .8 %( '6 7
RXCC_1X: ) 8 '( '6
TXCD_1X: ! 8 %( '6
RXCD_1X: ) 8 '( '6
C/T2_RDY: -( & * - D Note: This output is an Open-Drain output
when used as the Counter/Timer Ready Output.
RXRDY/-FFULL_C: '( &-$ $(' Note: This is an Open-Drain,
Active-low output for the RXRDY/FFULL_C function.
RXRDY/-FFULL_D: '( &-$ $(' Note: This is an Open-Drain,
Active-low output for the RXRDY/FFULL_D function.
-TXRDY_C: %( & $(' (% (% !(# '( 3 *
8!HG *'(
-TXRDY_D: ! %( & $(' (% (% !(# '( 3 *
8!HG! *'(
Note: The “shaded” Output Port pin alternate functions are only available in the 68 pin PLCC package option.
Table 22. Listing of the Alternate Functions for the Output Port
& * '( % * ( % + (% %' & 3((, (
+% ( * * % 3 ,(%% * 3%
Bit 7
OP7
L +PBQ
L 8!H)
Bit 6
OP6
L +P.Q
L 8!H
Bit 5
Bit 4
OP5
OP4
L +P9Q
L +P@Q
L 8!H-<<) L 8!H-<<
Bit 3
Bit 2
Bit 1
Bit 0
OP3
OP2
L +P4Q
L +PQ
L - D L 8 .8
L 8) 8 L 8 8
L 8) 8 L 8 8
Table 23. Output Port Configuration Register 1 - OPCR1
Bit 7
OP15
L +PBQ
L 8!H!
Bit 6
OP14
L +P.Q
L 8!H
Bit 5
Bit 4
OP13
OP12
L +P9Q
L +P@Q
L 8!H-<<! L 8!H-<<
Bit 3
Bit 2
Bit 1
Bit 0
OP11
OP10
L +P4Q
L +PQ
L - D L 8 .8
L 8! 8 L 88
L 8! 8 L 88
Table 24. Output Port Configuration Register 2 - OPCR2
Note: the OPCRs only addresses the alternate functions for Output Port pins, OP2 - OP7 and OP10 - OP15. OP0, OP1,
OP8 and OP9 assume their RTS roles if either MR1n[7] = 1 or MR2n[5] = 1. Setting those Mode Register bits enables the
RTS function. Otherwise, these two ports will only be General Purpose Output Ports.
B.