XR82C684
I. COMMENTS ABOUT THE XR82C684 IN 44 PIN
PLCC
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J. PROGRAMMING
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3 (' ' & + ,(% %%(, (%
% 3 ( Table 1
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Bit 7
Rx RTS Con-
trol
L:
L H%
Bit 6
Rx Int Select
Bit 5
Error Mode
L8!H
L<<
L
L ) '6
Bit 4
Bit 3
Parity Mode
Select
L E( +(&
L ' +(&
L : +(&
L (!
Bit 2
Parity
Select
L 5
L
Table 28. Mode Registers 1: MR1A, MR1B, MR1C, MR1D
Bit 1
Bit 0
Number of Bits/Char.
L 9
L .
L B
L 0
Bit 7
Bit 6
Channel Mode
L :
L 5'
L < ' <
L <
Bit 5
Tx RTS
Control
L:
L H%
Bit 4
CTS Enable
Tx
L:
L H%
Bit 3
Bit 2
Bit 1
Stop Bit Length
Bit 0
L 9.4
L .9
L .00
4 L B9
@ L 04
9 L 0B9
. L 40
B L
0 L 9.4
L .9
L .00
) L B9
L 04
! L 0B9
5 L 40
L
Table 29. Mode Register 2: MR2A, MR2B, MR2C, MR2D
Bit 7
Bit 6
Bit 5
Receiver Clock Select
Table 6
Bit 4
Bit 3
Bit 2
Bit 1
Transmitter Clock Select
Table 6
Table 30. Clock Select Registers: CSRA, CSRB, CSRC, CSRD
9
Bit 0