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XR88C681CJ View Datasheet(PDF) - Exar Corporation

Part Name
Description
MFG CO.
XR88C681CJ
Exar
Exar Corporation Exar
'XR88C681CJ' PDF : 101 Pages View PDF
TXCA
TXCB
IP2
ACR[4-6]
Preset Registers
(CTUR, CTLR)
Divide by 16
Counter/
Timer
Divide by 16
X1/CLK
X2
Oscillator
Circuit
Bit Rate
Generator
ACR[7]
XR88C681
IP4
(RXCA)
IP3
(TXCA)
IP5
(TXCB)
IP2
(RXCB)
32:1
MUX
TxCA
32:1
MUX
RxCA
32:1
MUX
TxCB
32:1
MUX
RxCB
Figure 24. Block Diagram of DUART Timing Control Block
Each element of the Timing Control Block is discussed
here:
D.1 Oscillator Circuit:
A crystal oscillator is typically connected externally
across the X1/CLK and X2 pins. The Oscillator Circuit
(within the chip) functions as the load for the resonant
(crystal) oscillator, and buffers the resulting oscillating
signal, for use by the Bit Rate Generator, and
Counter/Timer. A crystal or TTL signal frequency of
between 2 MHz and 4 MHz is required for proper
operation of the DUART. However, a crystal or TTL signal
frequency of 3.6864 MHz is required for the generation of
standard bit rates by the Bit Rate Generator (See
Table 18). Figure 25 presents a recommended
schematic for the XTAL Oscillator circuitry.
Rev. 2.11
51
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