XR88C681J View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XR88C681J' PDF : 99 Pages View PDF
XR88C681
RXCn TXCn
Incoming RXDn
Serial Data
Receive Shift Register
TXDn Outgoing Serial
Transmit Shift Register
Data
Receive Holding
Register
Transmit Holding
Register
8
To Data Bus
(To be read by the CPU)
CPU has no access to
the Transmitter
Figure 39. A Block Diagram Depict Automatic Echo Mode
In this mode:
1. Received data is transmitted on the channel’s TXD
output.
2. The receiver must be enabled but the transmitter need
not be enabled.
3. The channel’s TXRDY and TXEMT status bits are
inactive.
4. The received parity is checked but is not generated for
transmission. Thus, transmitted parity is as received.
5. Character framing is checked but the stop bits are
transmitted as received.
6. A received break is echoed as received until the next
valid start bit is detected.
7. CPU to receiver communications operates normally,
but the CPU to transmitter link is disabled.
Each DUART channel can be configured into one of two
diagnostic modes.
Local Loopback Mode
This mode is selected by setting MR2n[7:6] = 10.
Figure 40 is a diagram depicting Local Loopback Mode
operation.
Rev. 2.11
74
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