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XRT7302IV View Datasheet(PDF) - Exar Corporation

Part Name
Description
MFG CO.
XRT7302IV
Exar
Exar Corporation Exar
'XRT7302IV' PDF : 62 Pages View PDF
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PRELIMINARY
2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7302
REV. P1.1.6
4.0 DIAGNOSTIC FEATURES OF THE XRT7302
The XRT7302 supports equipment diagnostic activi-
ties by supporting the following Loop-Back modes in
each channel in the XRT7302:
Analog Local Loop-Back
Digital Local Loop-Back
Remote Loop-Back
4.1 THE ANALOG LOCAL LOOP-BACK MODE
When a given channel in the XRT7302 is configured
to operate in the Analog Local Loop-Back Mode, it ig-
nores any signals that are input to its RTIP(n) and
RRing(n) input pins. The Transmitting Terminal
Equipment transmits clock and data into this channel
via the TPData(n), TNData(n) and TxClk(n) input
pins. This data is processed through the Transmit
Clock Duty Cycle Adjust PLL and the HDB3/B3ZS
Encoder. Finally, this data outputs to the line via the
TTIP(n) and TRing(n) output pins. Additionally, this
data loops back into the Attenuator/Receive Equalizer
Block. This data is processed through the entire Re-
ceive Section of the channel. After this post-Loop-
Back data has been processed through the Receive
Section, it outputs to the Near-End Receiving Termi-
nal Equipment via the RPOS(n), RNEG(n) and Rx-
Clk(n) output pins.
Figure 27 illustrates the path the data takes in a given
channel of the XRT7302 when it is configured to op-
erate in the Analog Local Loop-Back Mode.
FIGURE 27. A CHANNEL IN THE XRT7302 OPERATING IN THE ANALOG LOCAL LOOP-BACK MODE
RLOL(n) EXClk(n)
RTIP(n)
RRing(n)
EqAuGalCiz/er
Slicer
Clock
Recovery
Invert
RxClk(n)
REQEN(n)
LOSTHR(n)
SDI
SDO
SClk
CS
REGR
TTIP(n)
TRing(n)
TxLEV(n)
TxOFF(n)
DMO(n)
Peak
Detector
LOS Detector
Serial
Processor
Interface
Analog Local
Loop-Back Path
Data
Recovery
HDB3/
B3ZS
Decoder
Loop MUX
Pulse
Shaping
HDB3/
B3ZS
Encoder
Device
Monitor
Transmit
Logic
Duty Cycle Adjust
RPOS(n)
RNEG(n)
LCV(n)
ENDECDIS
RLOS(n)
LLB(n)
RLB(n)
TAOS(n)
TPData(n)
TNData(n)
TxClk(n)
MTIP(n)
MRing(n)
Notes:
1. (n) = 0 or 1 for respective Channels
2. Serial Processor Interface input pins are shared by the two Channels in HOST Mode and redefined in Hardware Mode.
A given channel in the XRT7302 can be configured to
operate in the Analog Local Loop-Back Mode by em-
ploying either one of the following two steps:
NOTE: See Table 2 for a description of Command Registers
and Addresses for the different channels.
a. Operating in the HOST Mode
To configure Channel (n) to operate in the Analog Lo-
cal Loop-Back Mode, write a "1" into the LLB(n) bit-
field and a "0" into the RLB(n) bit-field in Command
Register CR4.
COMMAND REGISTER CR4-(n)
D4
D3
D2
D1
D0
X STS-1/DS3_ Ch(n) E3_ Ch(n) LLB(n) RLB(n)
X
X
X
1
0
b. Operating in the Hardware Mode
45
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