xr
XRT73L02M
REV. 1.0.0
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
TABLE 17: REGISTER MAP DESCRIPTION - CHANNEL 0
ADDRESS
(HEX)
TYPE
REGISTER
NAME
BIT#
SYMBOL
DESCRIPTION
DEFAULT
VALUE
D0 SR/DR_n Setting this bit configures the Receiver and Trans-
0
mitter in Single-Rail (NRZ) mode.
NOTE: See section 4.0 for detailed description.
D1
STS-1/ Setting this bit configures the channel into STS-1
0
DS3_n mode.
NOTE: This bit field is ignored if the channel is con-
figured to operate in E3 mode.
D2
E3_n Setting this bit configures the channel in E3 mode.
0
D3
LLB_n Setting this bit configures the channel in Local Loop-
0
back mode.
0x06 (Ch 0) R/W Block Con- D4
RLB_n Setting this bit configures the channel in Remote
0
0x0E (Ch 1)
trol
Loopback mode.
RLB_n
0
0
1
1
LLB_n
0
1
0
1
Loopback Mode
Normal Operation
Analog Local
Remote
Digital
D5 PRBSEN_ Setting this bit enables the PRBS generator/detec-
0
n
tor. PRBS generator generate and detect either 215-
1 (DS3 or STS-1) or 223-1 (for E3).
The pattern generated and detected are unframed
pattern.
D7-D6
Reserved
D0
Reserved
0
D1
Reserved
0
D2
Reserved
0
D3
Reserved
0
D4
0x07 (Ch 0) R/W Jitter
0x0F (Ch 1)
Attenuator D7-D5
Reserved
0
Reserved
0x08
0x10
0x18 -
0x1f
Reserved
39