XRT75L03 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT75L03' PDF : 92 Pages View PDF
XRT75L03
REV. 1.0.4
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
BIT NUMBER
NAME
5
Digital LOS Defect
Declared
TYPE
R/O
DEFAULT
VALUE
DESCRIPTION
0
Digital LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the Dig-
ital LOS (Loss of Signal) detector is declaring the LOS
Defect condition.
For DS3 and STS-1 applications, the Digital LOS Detector
will declare the LOS Defect condition whenever it detects
an absence of pulses (within the incoming DS3 or STS-1
data-stream) for 160 consecutive bit-periods.
Further, (again for DS3 and STS-1 applications) the Digital
LOS Detector will clear the LOS Defect condition whenever
it determines that the pulse density (within the incoming
DS3 or STS-1 signal) is at least 33%.
0 - Indicates that the Digital LOS Detector is NOT declaring
the LOS Defect Condition.
1 - Indicates that the Digital LOS Detector is currently
declaring the LOS Defect condition.
NOTES:
1. LOS Detection (within each channel of the
XRT75L03) is performed by both an Analog LOS
Detector and a Digital LOS Detector. The LOS
state of a given Channel is simply a WIRED-OR
of the LOS Defect Declare states of these two
detectors.
2. The current LOS Defect Condition (for the
channel) can be determined by reading out the
contents of Bit 1 (Receive LOS Defect Declared)
within this register.
71
Share Link: 
