XRT75L04
FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
FIGURE 26. ANALOG LOOPBACK
REV. 1.0.4
TCLK
TPDATA
TNDATA
1
HDB3/B3ZS
ENCODER
TIMING
CONTROL
Tx
TTIP
TRING
RCLK
RPOS
RNEG
1
HDB3/B3ZS
DECODER
DATA &
CLOCK
Rx
RECOVERY
1 if enabled
2 if enabled and selected in either Receive or
Transmit path
RTIP
RRING
8.2.2 DIGITAL LOOPBACK:
The Digital Loopback function is available either in Hardware mode or Host mode. When the Digital Loopback
is selected, the transmit clock (TxClk_n) and transmit data inputs (TPOS_n & TNEG_n) are looped back and
output onto the RxClk_n, RPOS_n and RNEG_n pins as shown in Figure 27. The data presented on TxClk,
TPOS and TNEG are not output on the TTIP and TRING pins.This provides the capability to configure the
protection card (in redundancy applications) in Digital Loopback mode without affecting the traffic on the
primary card.
NOTE: Signals on the RTIP_n and RRING_n pins are ignored during digital loopback.
FIGURE 27. DIGITAL LOOPBACK
TCLK
TPDATA
TNDATA
1
HDB3/B3ZS
ENCODER
TIMING
Tx
CONTROL
TTIP
TRING
RCLK
RPOS
RNEG
1
HDB3/B3ZS
DECODER
1 if enabled
2 if enabled and selected in either Receive or
Transmit path
DATA &
CLOCK
Rx
RECOVERY
RTIP
RRING
50