XRT75L06 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT75L06' PDF : 63 Pages View PDF
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75L06
REV. 1.0.3
6.0 MICROPROCESSOR INTERFACE BLOCK
The Microprocessor Interface section supports communication between the local microprocessor (µP) and the
LIU. The XRT75L06 supports a parallel interface asynchronously or synchronously timed to the LIU. The mi-
croprocessor interface is selected by the state of the Pmode input pin. Selecting the microprocessor interface
mode is shown in Table 11.
TABLE 11: SELECTING THE MICROPROCESSOR INTERFACE MODE
PMODE
MICROPROCESSOR MODE
"Low"
Asynchronous Mode
"High"
Synchronous Mode
The local µP configures the LIU by writing data into specific addressable, on-chip Read/Write registers. The
µP provides the signals which are required for a general purpose microprocessor to read or write data into
these registers. The µP also supports polled and interrupt driven environments. A simplified block diagram of
the microprocessor is shown in Figure 34.
FIGURE 34. SIMPLIFIED BLOCK DIAGRAM OF THE MICROPROCESSOR INTERFACE BLOCK
CS
WR
RD
Addr[7:0]
D[7:0]
PCLK
Pmode
RESET
RDY
INT
Microprocessor
Interface
42
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