XRT79L71_10 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT79L71_10' PDF : 609 Pages View PDF
REV. P2.0.0
PRELIMINARY
XRT79L71
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
TABLE 7: LIST OF ALL OF THE POSSIBLE CONDITIONS THAT CAN GENERATE INTERRUPTS WITHIN THE XRT79L71
WHEN CONFIGURED TO OPERATE IN THE CLEAR-CHANNEL FRAMER MODE
FUNCTIONAL BLOCK
INTERRUPT CONDITION
DS3/E3 Framer Block (Consists of both Transmit DS3/E3 Framer Block Interrupts
the Transmit DS3/E3 Framer Block, the • Completion of Transmission of FEAC Message (DS3,C-bit Parity Only)
Transmit PLCP Processor Block, the
Receive DS3/E3 Framer Block and the • Completion of Transmission of LAPD/PMDL Message
Receive PLCP Processor Block)
Transmit PLCP Processor Block Interrupts
• None
Receive DS3/E3 Framer Block Interrupts
• Change of LOS (Loss of Signal) Defect Condition
• Change of OOF (Out of Frame) Defect Condition
• Change of AIS Defect Condition
• Change in Trail-Trace Buffer Message (E3, ITU-T G.832 only)
• Change of FERF/RDI (Yellow Alarm) Defect Condition
• Detection of P-Bit Errors (DS3 Applications only)
• Detection of CP-Bit Errors (DS3, C-bit Parity Applications only)· Detection of
BIP-4 Error (E3, ITU-T G.751 only)
• Detection of BIP-8 Error (E3, ITU-T G.832 only)· Detection of FEBE (Far-End
Block Error) Event
• Validation of FEAC Message (DS3, C-bit Parity Only)·
• Removal of FEAC Message (DS3, C-bit Parity Only)
• Receipt of New LAPD/PMDL Message
• One Second Interrupt
Receive PLCP Processor Block Interrupts
• Change of PLCP OOF Defect Condition
• Change of PLCP LOF Defect Condition
• Change of PLCP RAI Defect Condition
DS3/E3 LIU Block
• Change of FL (Jitter Attenuator FIFO Limit Alarm) Condition
• Change of LOL (Receive Loss of Lock) Condition
• Change of LOS (Loss of Signal) Condition
• Change of DMO (Transmit Drive Monitor Output) Condition
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