XRT79L74
REV. P1.0.0
PRELIMINARY
4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
FIGURE 12. TIMING DIAGRAM FOR THE TRANSMIT PAYLOAD DATA INPUT INTERFACE WHEN THE XRT79L74 IS
OPERATING IN BOTH THE DS3 AND LOCAL-TIMING MODES
XRT79L74 Transmit Payload Data I/F Signals
t6
t5
TxInClkn
t8
t7
TxSern
TxFrameRefn
Payload[4702] Payload[4703]
X-Bit
Payload[1]
TxOH_Indn
t9
t10
DS3 Frame Number N DS3 Frame Number N + 1
FIGURE 13. TIMING DIAGRAM FOR THE TRANSMIT PAYLOAD DATA INPUT INTERFACE WHEN THE XRT79L74 IS
OPERATING IN BOTH THE DS3/NIBBLE-PARALLEL AND LOOP-TIMING MODES
t13A
RxOutClkn
TxNibClkn
TxNibn[3:0]
TxNibFramen
t13
t11
t12
Nibble [1175]
Sampling Edge of XRT79L74
Nibble [0]
56