XRT8001ID View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT8001ID' PDF : 48 Pages View PDF
XRT8001
Value of “M”
1
2
4
8
Value to be Written into
Command Register CR2
0000X
0001X
001XX
X1XX or 1XXX
Table 7. Relationship Between the Value of
“M” and the Value to Be Written into Command
Register CR2 (in Order to Configure the “CLK1”
Output Frequency)
Note: The expression “X” indicates a “Don’t Care” value for
that particular bit-field.
Command Register, CR2 (Address = 0x02)
D4
D3
D2
D1
D0
SEL14 SEL13 SEL12 SEL11 SEL10
Value from Table 7
Step 5 – Specify the value for “M” (e.g., as in the “M x
2.048MHz” clock signal) which is to be the output on
the “CLK2” output pin.
This is accomplished by reviewing Table 8, and deter-
mining the 5-bit binary value which corresponds with
the desired value of “M”. Afterwards, the user should
write this value into Command Register, CR3.
Value of “M”
1
2
4
8
Value to be Written into
Command Register CR3
0000X
0001X
001XX
X1XXX or 1XXXX
Command Register, CR3 (Address = 0x03)
D4
D3
D2
D1
D0
SEL24 SEL23 SEL22 SEL21 SEL20
Value from Table 8
Step 6 – Enable any of the following output signals as
appropriate: “SYNC”, “CLK1”, “CLK2” and
“LOCKDET”.
This is accomplished by writing a “1” into the corre-
sponding bit-fields, within Command Register CR4, as
illustrated below:
Command Register CR4, (Address = 0x04)
D4
D3
D2
D1
D0
SYNCEN CLK1EN CLK2EN LDETDIS2 LDETDIS1
1
1
1
0
0
6.8 The "Forward/Slave" Mode
When the XRT8001 WAN Clock has been configured to
operate in the “Forward/Slave” Mode, then it will accept
an 8kHz clock signal via the “Reference Clock” input at
FIN (pin 3). In response to this clock signal, the
XRT8001 WAN Clock will output either a “L x 56kHz” or
“L x 64kHz” clock signal via the “Clock Output pins”
(CLK1 and CLK2); where L can range in value from 1 to
32.
A simple illustration of the XRT8001 WAN Clock
operating in the "Forward/Slave" Mode” is presented in
Figure 18.
Table 8. Relationship Between the Value of
“M” and the Value to Be Written into Command
Register CR3 (in Order to Configure the “CLK2”
Output Frequency)
Note: The expression “X” indicates a “Don’t Care” value
for that particular bit-field.
Rev. 1.01
30
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