XRT83SH38ES View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT83SH38ES' PDF : 78 Pages View PDF
REV. 1.0.7
BIT
D2
D1
D0
XRT83SH38
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
TABLE 42: MICROPROCESSOR REGISTER 0X8DH BIT DESCRIPTION
GLOBAL REGISTER (0X8DH)
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
BYTEsel LCV Counter Byte Select
R/W
0
This bit is used to select the MSB or LSB for Reading the contents
of the LCV counter for a given channel. The channel is addressed
by using bits D[3:0] in register 0x8Ch. By default, the LSB byte is
selected.
0 = Low Byte
1 = High Byte
chUPDATE LCV Counter Update Per Channel
R/W
0
This bit is used to latch the contents of the counter for a given
channel into a holding register so that the value of the counter can
be read. The channel is addressed by using bits D[3:0] in register
0x8Ch.
0 = Normal Operation
1 = Updates the Selected Channel
chRESET LCV Counter Reset Per Channel
R/W
0
This bit is used to reset the LCV counter of a given channel to its
default state 0000h. The channel is addressed by using bits D[3:0]
in register 0x8Ch. This bit must be set to "1" for 1µS.
0 = Normal Operation
1 = Resets the Selected Channel
TABLE 43: MICROPROCESSOR REGISTER 0X8EH BIT DESCRIPTION
GLOBAL REGISTER (0X8EH)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
LCVCNT7 Line Code Violation Byte Contents
R/W
0
D6
LCVCNT6 These bits contain the LCV counter contents of the Byte selected
0
D5
LCVCNT5 by bit D2 in register 0x8Dh for a given channel. The channel is
0
D4
LCVCNT4 addressed by using bits D[3:0] in register 0x8Ch. By default, the
0
D3
LCVCNT3 contents contain the LSB, however no channel is selected..
0
D2
LCVCNT2
0
D1
LCVCNT1
0
D0
LCVCNT0
0
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