XRT83SL30IV-F View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
XRT83SL30IV-F
Exar Corporation
'XRT83SL30IV-F' PDF : 77 Pages View PDF
XRT83SL30
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TRANSMIT AND RECEIVE TERMINATIONS
REV. 1.0.1
The XRT83SL30 is a versatile LIU that can be programmed to use one Bill of Materials (BOM) for worldwide
applications for T1, J1 and E1. For specific applications the internal terminations can be disabled to allow the
use of existing components and/or designs.
RECEIVER
INTERNAL RECEIVE TERMINATION MODE
In Hardware mode, RXTSEL (Pin 44) can be tied “High” to select internal termination mode or tied “Low” to
select external termination mode. By default the XRT83SL30 is set for external termination mode at power up
or at Hardware reset.
TABLE 6: RECEIVE TERMINATION CONTROL
RXTSEL
RX TERMINATION
0
EXTERNAL
1
INTERNAL
In Host mode, bit 7 in the appropriate register, (Table 19, “Microprocessor Register #1 bit description,” on
page 45), is set “High” to select the internal termination mode for the receive channel.
FIGURE 11. SIMPLIFIED DIAGRAM FOR THE INTERNAL RECEIVE AND TRANSMIT TERMINATION MODE
TPOS
TNEG
TCLK
TX
Line Driver
RPOS
RNEG
RCLK
RX
Equalizer
TTIP
1 T1 5
Rint
0.68µF
TRING
Rint
RTIP
Rint
RRING
4
8
1:2
5 T2 1
8
4
1:1
TTIP
75 Ω, 100 Ω
110 Ω or 120 Ω
TRING
RTIP
75 Ω, 100 Ω
110 Ω or 120 Ω
RRING
If the internal termination mode (RXTSEL = “1”) is selected, the effective impedance for E1, T1 or J1 can be
achieved either with an internal resistor or a combination of internal and external resistors as shown in Table 7.
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