XRT83SL38ES-BG View Datasheet(PDF) - Exar Corporation

Part Name

Description

MFG CO.

XRT83SL38ES-BG

OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER

Exar Corporation 

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XRT83SL38

OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

REV. P1.1.0

PRELIMINARY

SIGNAL NAME

TNEG_0

CODES_0

TNEG_1

CODES_1

TNEG_2

CODES_2

TNEG_3

CODES_3

TNEG_4

CODES_4

TNEG_5

CODES_5

TNEG_6

CODES_6

TNEG_7

CODES_7

TCLK_0

TCLK_1

TCLK_2

TCLK_3

TCLK_4

TCLK_5

TCLK_6

TCLK_7

TQFP

PIN #

205

200

165

160

56

61

96

101

203

202

163

162

58

59

98

99

BGA

LEAD #

TYPE

DESCRIPTION

C4

I Transmitter Negative NRZ Data Input for Channel _0

Dual-Rail mode

This signal is the negative-rail input data for transmitter 0.

Single-Rail mode

This pin can be left unconnected.

C4

Coding Select for Channel _0 - Hardware mode and Single-Rail mode

Connecting this pin “Low” enables HDB3 in E1 or B8ZS in T1 encoding and

decoding for Channel _0. Connecting this pin “High” selects AMI data for-

B5

mat.

Transmitter Negative NRZ Data Input for Channel _1

D13

Coding Select for Channel _1

Transmitter Negative NRZ Data Input for Channel _2

B15

Coding Select for Channel _2

Transmitter Negative NRZ Data Input for Channel _3

U4

Coding Select for Channel _3

Transmitter Negative NRZ Data Input for Channel _4

V5

Coding Select for Channel _4

Transmitter Negative NRZ Data Input for Channel _5

U14

Coding Select for Channel _5

Transmitter Negative NRZ Data Input for Channel _6

R14

Coding Select for Channel _6

Transmitter Negative NRZ Data Input for Channel _7

Coding Select for Channel _7

NOTE: Internally pulled “Low” with a 50kΩ resistor for each channel.

B4

I Transmitter Clock Input for Channel _0 - Host mode and Hardware

mode

E1 rate at 2.048MHz ± 50ppm. T1 rate at 1.544MHz ± 32ppm.

During normal operation TCLK_0 is used for sampling input data at

TPOS_0/TDATA_0 and TNEG_0/CODES_0 while MCLK is used as the

timing reference for the transmit pulse shaping circuit.

Transmitter Clock Input for Channel _1

A3

Transmitter Clock Input for Channel _2

A15

C14

Transmitter Clock Input for Channel _3

Transmitter Clock Input for Channel _4

T3

Transmitter Clock Input for Channel _5

T5

Transmitter Clock Input for Channel _6

V16

Transmitter Clock Input for Channel _7

U15

NOTE: Internally pulled “Low” with a 50kΩ resistor for all channels.

9

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