XRT83SL38
OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.1.0
DUAL LOOP-BACK
Figure 22 depicts the data flow in dual-loopback. In this mode, selecting the jitter attenuator in the transmit path
will have the same result as placing the jitter attenuator in the receive path. In dual Loop-Back mode the
recovered clock and data from the line are looped back through the transmitter to the TTIP and TRING without
passing through the jitter attenuator. The transmit clock and data are looped back through the jitter attenuator
to the RCLK and RPOS/RDATA and RNEG pins.
FIGURE 22. SIGNAL FLOW IN DUAL LOOP-BACK MODE
TPOS
TNEG
TCLK
RCLK
RPOS
RNEG
Encoder
JA
Decoder
Timing
Control
Tx
TTIP
TRING
Data &
Clock
Recovery
RTIP
Rx
RRING
44