REV. P1.0.0
BIT
D1
D0
PRELIMINARY
XRT83VSH28
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
TABLE 25: MICROPROCESSOR REGISTER 0X06H BIT DESCRIPTION
CHANNEL 0-7 (0X06H-0X76H)
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
RLOSIS
Receiver Loss of Signal Status
0 = No change
1 = Change in status occurred
RUR
0
QRPDIS
Quasi Random Pattern Detection Status
0 = No change
1 = Change in status occurred
RUR
0
NOTE: Any change in status will generate an interrupt (if enabled in channel register 0x04h and GIE is set to "1" in the
global register 0x80h). The status registers are reset upon read (RUR).
TABLE 26: MICROPROCESSOR REGISTER 0X08H BIT DESCRIPTION
CHANNEL 0-7 (0X08H-0X78H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved This Register Bit is Not Used
X
0
D6
1SEG6 Arbitrary Pulse Generation
R/W
0
D5
1SEG5 The transmit output pulse is divided into 8 individual segments.
0
D4
1SEG4 This register is used to program the first segment which corre-
0
D3
1SEG3 sponds to the overshoot of the pulse amplitude. There are four
0
segments for the top portion of the pulse and four segments for the
D2
1SEG2 bottom portion of the pulse. Segment number 5 corresponds to
0
D1
1SEG1 the undershoot of the pulse. The MSB of each segment is the sign
0
D0
1SEG0 bit.
0
Bit 6 = 0 = Negative Direction
Bit 6 = 1 = Positive Direction
BIT
D7
D[6:0]
TABLE 27: MICROPROCESSOR REGISTER 0X09H BIT DESCRIPTION
CHANNEL 0-7 (0X09H-0X79H)
NAME
FUNCTION
Register
Type
Reserved This Register Bit is Not Used
X
2SEG[6:0] Segment Number Two, Same Description as Register 0x08h
R/W
Default
Value
(HW reset)
0
58