XRT84L38
OCTAL T1/E1/J1 FRAMER
REV. 1.0.1
Framing Select Register (FSR) - E1 Mode (Indirect Address = 0xn0H, 0x07H)
BIT 7
BIT 6
BIT 5
BIT 4
BIT3
BIT 2
BIT 1
Annex B
Enable
CRC
Diagnostics
Select
CAS
Selection bit
1
CAS
Selection bit
0
CRC-4
Selection bit
1
CRC-4
Selection bit
0
FAS
Alignment
Frame
Check
Sequence
Enable
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
1
0
0
BIT 0
FAS
Selection bit
R/W
0
BIT NUMBER
BIT NAME
7
Annex B Enable
6
CRC Diagnostics Select
BIT TYPE
BIT DESCRIPTION
R/W Signaling Update on Super-frame Boundary:
This READ/WRITE bit-field controls the framer to be compliant
with ITU-T Recommendation G.706 Annex B for CRC-to-non-
CRC internetworking detection.
When this bit is set to zero:
The framer will operate in normal condition. That is, ITU-T G.706
Annex B is disabled.
When this bit is set to one:
The framer will enable support of ITU-T G.706 Annex B.
R/W CRC Diagnostics Select:
This READ/WRITE bit-field allows the user to insert CRC errors
into outgoing data stream. A transition from zero to one of this bit
will prompt the framer to invert the value of one CRC bit.
When this bit is set to zero:
The framer will operate normally and there is no insertion of erro-
neous CRC bit.
When this bit is set to one:
One CRC error will be inserted into the outgoing data stream
when this bit is transitioned from zero to one.NOTE:To send
another CRC error, the framer has to reset this bit to zero and
set it to one again.
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