Z8018520FSC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z8018520FSC' PDF : 95 Pages View PDF
Zilog
System Configuration Register
PRELIMINARY
Z80185/Z80195
SMART PERIPHERAL CONTROLLERS
This register controls a number of device-level features on
the Z80185 and includes the following control bits:
D7 D6 D5 D4 D3 D2 D1 D0
Daisy-Chain Configuration
ROM Emulator Mode (REME)
0 = Data Bus in Normal Mode
1 = Data Bus in ROM Emulator Mode
0 = ESCC CLK is PHI
1 = ESCC CLK is PHI/2
0 = /RTS0, /CTS0, CKA0
1 = TxS, RxS, CKS
Disable /ROMCS
0 = /ROMCS is Enabled
1 = /ROMCS is Disabled
Daisy-Chain Configuration
Decode High I/O
0 = A15-8 not decoded for
"non-180" registers.
1 = A15-8 must be 00 to
access "non-180" regs.
Figure 82. System Configuration Register
(I/O Address %ED)
80
DS971850301
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