Z86C0816PSG View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z86C0816PSG' PDF : 348 Pages View PDF
Z8 Family of Microcontrollers
User Manual
26
The functions and applications of the control and peripheral registers are
described in subsequent sections of this manual.
Program Memory
The first 12 bytes of program memory are reserved for the interrupt vec-
tors, as shown in Figure 8. These locations contain six 16-bit vectors that
correspond to the six available interrupts. Address 12 up to the maximum
ROM address consists of on-chip mask-programmable ROM. See the
product data sheet for the exact program, data, register memory size, and
address range available. At addresses outside the internal ROM, the Z8®
CPU executes external program memory fetches through Port 0 and Port
1 in Address/Data mode for devices with Port 0 and Port 1 featured. Oth-
erwise, the program counter will continue to execute NOPs up to address
FFFFh, roll over to 0000h, and continue to fetch executable code (see
Figure 8).
The internal program memory is one-time programmable (OTP) or mask
programmable dependent on the specific device. A ROM protect feature
prevents dumping of the ROM contents by inhibiting execution of the
LDC, LDCI, LDE, and LDEI instructions to program memory in all
modes. ROM look-up tables cannot be used with this feature.
The ROM Protect option is mask-programmable, to be selected by the
customer when the ROM code is submitted. For the OTP ROM, the ROM
Protect option is an OTP programming option.
Address Space
UM001602-0904
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