Zilog
Z86C72/C92/L72/L92
IR Microcontroller
Interrupts. The Z86L7X/CX2 has five different interrupts. counter/timers (Table 3). The Interrupt Mask Register glo-
The interrupts are maskable and prioritized (Figure 35). bally or individually enables or disables the five interrupt
The five sources are divided as follows: three sources are requests.
claimed by Port 3 lines P33-P31, the remaining two by the
1
IRQ0 IRQ2
IRQ 1, 3, 4
Interrupt
Edge
Select
IRQ Register (D6, D7)
IRQ
IMR
5
Interrupt
Request
Global
Interrupt
Enable
IPR
Priority
Logic
Vector Select
Figure 35. Interrupt Block Diagram
DS97LVO0900
PRELIMINARY
6-49