Z86C8316PSC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z86C8316PSC' PDF : 46 Pages View PDF
Z86C83/C84
Z8® MCU Microcontrollers
FUNCTIONAL DESCRIPTION (Continued)
DAC Output in Volts
3.5V
VDHI
2% accuracy
2.15
1.7
1.26
1/4X
1/2X 1X
VDLO .8
0
Notes:
Vcc = 5.0V ±10%
VDHI = 3.5V
VDLO = 0.8V
80H
DAC Data Register Value
Figure 33. Gain Control on DAC
3.5
3.05
2.6
2.15
FFH
Power-On Reset (POR). A timer circuit clocked by a
dedicated on-board RC oscillator or by the XTAL oscillator
is used for the POR timer function. The POR time allows
VCC and the oscillator circuit to stabilize before instruction
execution begins. The POR timer circuit is a one-shot timer
triggered by one of three conditions:
s Power Fail to Power OK Status
s Stop-Mode Recovery (If D5 of SMR Register = 1)
s WDT Time-Out (Including from Stop Mode)
The POR time is TPOR minimum. Bit 5 of the STOP Mode
Register determines whether the POR timer is bypassed
after Stop-Mode Recovery (typical for external clock, and
RC/LC oscillators with fast start up time).
HALT. Turns off the internal CPU clock but not the XTAL
oscillation. The counter/timers and external interrupts
IRQ0, IRQ1, and IRQ2 remain active. The device is
recovered by interrupts, either externally or internally
generated (a POR or a WDT time-out). An interrupt
request must be executed (enabled) to exit HALT mode.
After the interrupt service routine, the program continues
from the instruction after the HALT. In case of a POR or a
WDT time-out, program execution will restart at address
000CH.
STOP. This instruction turns off the internal clock and
external crystal oscillation and reduces the standby
current to 10 µA (typical) or less. The STOP mode is
terminated by a reset of either WDT time-out, POR, or
Stop-Mode Recovery. This causes the processor to restart
the application program at address 000CH.
33
DS96DZ80203
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