Z86D99 View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z86D99' PDF : 91 Pages View PDF
Z86L972/Z86L973/Z86L974
Low-Voltage Microcontrollers
41
HI16
8
LO16
8
Input
Glitch
Filter
Edge
Detect
Circuit
16-Bit
T16
1248
Timer 16
8
TC16H
16
SCLK Clock
Divider
8
T16 Clocked
TC16L
And/Or
Logic
Timer
8/16
HI8
8
8-Bit
T8
8
TC8H
LO8
8
8
TC8L
Figure 30. Counter/Timer Architecture
Timer 8
1248
SCLK Clock
Divider
T8 Clock Divider
T8 Transmit Mode
Before T8 is enabled, the output of T8 depends on CTR1, D1. If CTR1, D1 is 0,
T8_OUT is 1. If CTR1, D1 is 1, T8_OUT is 0.
When T8 is enabled, the output T8_OUT switches to the initial value (CTR1 D1). If
the initial value (CTR1 D1) is 0, TC8L is loaded; otherwise, TC8H is loaded into
the counter. In single-pass mode (CTR0 D6), T8 counts down to 0 and stops,
T8_OUT toggles, the time-out status bit (CTR0 D5) is set, and a time-out interrupt
can be generated if it is enabled (CTR0 D1). In modulo-N mode, upon reaching
terminal count, T8_OUT is toggled, but no interrupt is generated. Then T8 loads a
new count (if T8_OUT level is 0), TC8L is loaded; if T8_OUT is 1, TC8H is loaded.
PS010504-1002
PRELIMINARY
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