Z86E06_04 View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z86E06_04' PDF : 348 Pages View PDF
Z8 CPU
User Manual
39
• Signal lines should not run parallel to the clock oscillator inputs. In
particular, the crystal input circuitry and the internal system clock
output should be separated as much as possible.
• VCC power lines should be separated from the clock oscillator input
circuitry.
• Resistivity between XTAL1 or XTAL2 and the other pins should be
greater than 10 MΩ.
UM001602-0904
Clock
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