Z86E0812PSC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z86E0812PSC' PDF : 44 Pages View PDF
Zilog
Z86E04/E08
CMOS Z8 OTP Microcontrollers
Low EMI Emission
ROM Protect. ROM Protect fully protects the Z86E04/E08
The Z86E04/E08 can be programmed to operate in a low
EMI Emission (Low Noise) Mode by means of an EPROM
programmable bit option. Use of this feature results in:
ROM code from being read externally. When ROM Protect
is selected, the instructions LDC and LDCI are supported
(Z86E04/E08 and Z86C04/C08 do not support the instruc-
tions of LDE and LDEI). When the device is programmed
1
s Less than 1 mA consumed during HALT Mode.
for ROM Protect, the Low Noise feature will not automati-
cally be enabled.
s All drivers slew rates reduced to 10 ns (typical).
Please note that when using the device in a noisy environ-
s Internal SCLK/TCLK = XTAL operation limited to a
maximum of 4 MHz - 250 ns cycle time.
s Output drivers have resistances of 500 ohms (typical).
ment, it is suggested that the voltages on the EPM and CE
pins be clamped to VCC through a diode to VCC to prevent
accidentally entering the OTP Mode. The VPP requires
both a diode and a 100 pF capacitor.
s Oscillator divide-by-two circuitry eliminated.
The Z86E04/E08 offers programmable ROM Protect and
programmable Low Noise features. When programmed for
Low Noise, the ROM Protect feature is optional.
In addition to VDD and GND (VSS), the Z86E04/E08 chang-
es all its pin functions in the EPROM Mode. XTAL2 has no
function, XTAL1 functions as /CE, P31 functions as /OE,
P32 functions as EPM, P33 functions as VPP, and P02
functions as /PGM.
Auto Latch Disable. Auto Latch Disable option bit when
programmed will globally disable all Auto Latches.
WDT Enable. The WDT Enable option bit, when pro-
grammed, will have the hardware enabled Permanent
WDT enabled after exiting reset and can not be stopped in
Halt or Stop Mode.
EPROM/Test Mode Disable. The EPROM/Test Mode
Disable option bit, when programmed, will disable the
EPROM Mode and the Factory Test Mode. Reading, veri-
fying, and programming the Z8 will be disabled. To fully
verify that this mode is disabled, the device must be power
cycled.
User Modes. Table 7 shows the programming voltage of
each mode of Z86E04/E08.
Table 7. OTP Programming Table
Programming Modes
VPP
EPM
/CE
/OE
/PGM
EPROM READ1
EPROM READ2
PROGRAM
NU
VH
VIL
VIL
VIH
NU
VH
VIL
VIL
VIH
VH
X
VIL
VIH
VIL
PROGRAM VERIFY
VH
EPROM PROTECT
VH
LOW NOISE SELECT
VH
AUTO LATCH DISABLE
VH
WDT ENABLE
VH
EPROM/TEST MODE
VH
X
VIL
VIL
VIH
VH
VH
VIH
VIL
VIH
VH
VIH
VIL
VIH
VH
VIL
VIL
VIL
VH
VIH
VIL
VIL
VH
VIL
VIL
Notes:
1. VH =13.0V ± 0.25 VDC .
2. VIH = As per specific Z8 DC specification.
3. VIL= As per specific Z8 DC specification.
4. X = Not used, but must be set to VH or VIH level.
5. NU = Not used, but must be set to either VIH or VIL level.
6. IPP during programming = 40 mA maximum.
7. ICC during programming, verify, or read = 40 mA maximum.
8. * VCC has a tolerance of ±- 0.25V.
9. † VCC = 5.0V is acceptable.
ADDR
ADDR
ADDR
ADDR
ADDR
NU
NU
NU
NU
NU
DATA
Out
Out
In
Out
NU
NU
NU
NU
NU
VCC*
4.5V†
5.5V†
6.4V
6.4V
6.4V
6.4V
6.4V
6.4V
6.4V
DS97Z8X0401
PRELIMINARY
33
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