CMOS Z8® OTP Microcontrollers
Product Specification
68
WDTMR (F) 0F
D7 D6 D5 D4 D3 D2 D1 D0
* Default setting after RESET
WDT TAP INT RC OSC External Clock
00
5 ms
128 TpC
01*
10 ms
256 TpC
10
20 ms
512 TpC
11
80 ms
2048 TpC
WDT During HALT
0 OFF
1 ON*
WDT During STOP
0 OFF
1 ON*
XTAL1/INT RC Select for WDT
0 On-Board RC*
1 XTAL
Reserved (Must be 0)
Figure 38. Watchdog Timer Mode Register (Write Only)
SMR (0F) Dh
D7 D6 D5 D4 D3 D2 D1 D0
STOP-Mode Recovery Source 2
00 POR only*
01 AND P20, P21, P22, P23
10 AND P20, P21, P22, P23, P24,
P25, P26, P27
Reserved (Must be 0)
Note: Not used in conjunction with SMR Source
Figure 39. Stop Mode Recovery Register2 (Write Only)
PS022901-0508
Electrical Characteristics