Z86L8608SSC View Datasheet(PDF) - Maxim Integrated
Part Name
Description
MFG CO.
'Z86L8608SSC' PDF : 88 Pages View PDF
Z86L81/86/98
28-Pin Low-Voltage Infrared Microcontrollers
58
Table 16. Stop-Mode Recovery Source
SMR:432
Operation
D4
D3
D2 Description of Action
0
0
0 POR and/or external reset
recovery
0
0
1 Reserved
0
1
0 P31 transition
0
1
1 P32 transition
1
0
0 P33 transition
1
0
1 P27 transition
1
1
0 Logical NOR of P20 through P23
1
1
1 Logical NOR of P20 through P27
Note: Any Port 2 bit defined as an output drives the corresponding
input to the default state to allow the remaining inputs to control
the AND/OR function. Refer to SMR2 register on page 58 for
other recover sources.
Stop-Mode Recovery Delay Select (D5)
This bit, if low, disables the 5 ms RESET delay after Stop-Mode Recovery. The
default configuration of this bit is 1. If the “fast” wake up is selected, the Stop-
Mode Recovery source must be kept active for at least 5 TpC.
Stop-Mode Recovery Edge Select (D6)
A 1 in this bit position indicates that a High level on any one of the recovery
sources wakes the Z86L81/86/98 from STOP Mode. A 0 indicates Low level
recovery. The default is 0 on POR.
Cold or Warm Start (D7)
This bit is read only, and it is set to 1 when the device is recovered from stop
mode. The bit is set to 0 when the device reset is other than Stop Mode Recovery
(SMR).
Stop-Mode Recovery Register 2 (SMR2)
This register determines the mode of Stop-Mode Recovery for SMR2 (Figure 32).
19-4615; Rev 0; 4/09
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