Z89373 View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z89373' PDF : 61 Pages View PDF
PRELIMINARY
16-bit Programmable I/O (Port 0)
Z89323/373/393
16-BIT DIGITAL SIGNAL PROCESSORS
When the appropriate bit is set in the Port 1 control register,
Port 0 acts as a 16-bit programmable, bidirectional, CMOS-
compatible port. Each of the 16 lines can be independently
programmed as an input or an output, or globally as an
open-drain output. When enabled, Bank 0/Ext 4 acts as the
data I/O register. Bank 15/Ext 0 serves as the Port 0
direction register while Bank 15/Ext 1, has specified bits to
enable Port 0 and determine whether Port 0 is globally
configured as open-drain outputs.
Bank 15/Ext 0 Reg
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Port I/O Direction
0 = Output
1 = Input
Figure 19. Port 0 Control Register
Open-Drain
OEN
Pad
Out
In
R ≈ 500 kOhms
Auto Latch
Figure 20. Port 0, 1 and 2 Configuration
DS95DSP0101 Q4/95
29
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