Z89C0010VSC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z89C0010VSC' PDF : 28 Pages View PDF
ZILOG
AC TIMING DIAGRAM
2
PRELIMINARY
1
CLK
5
6
11
/EI
ER//W
EXT Bus: Output
Z89C00
16-BIT DIGITAL SIGNAL PROCESSOR
7
10
5
EXT15-EXT0
Valid Data Out
EA2-EA0
/RDYE
Valid Address Out
19
20
Figure 17. Write To External Device Timing
(/RDYE used to hold data one clock cycle)*
Note: * /RDYE is checked during rising edge of clock.
24
DC 4083-00
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