Z8F022ASB020SG View Datasheet(PDF) - Zilog

Part Name

Description

MFG CO.

Z8F022ASB020SG

High-Performance 8-Bit Microcontrollers Z8 Encore! XP® F082A Series

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Z8 Encore! XP® F082A Series

Product Specification

212

eZ8 CPU Instruction Summary

Table 128 summarizes the eZ8 CPU instructions. The table identifies the addressing

modes employed by the instruction, the effect upon the Flags Register, the number of CPU

clock cycles required for the instruction fetch and the number of CPU clock cycles

required for the instruction execution.

Table 128. eZ8 CPU Instruction Summary

Assembly

Mnemonic

Symbolic Operation

Address

Mode

dst src

Opcode(s)

Flags

Fetch Instr.

Cycle Cycle

(Hex) C Z S V D H s

s

ADC dst, src dst  dst + src + C

r

r

12

****0* 2

3

r

Ir

13

2

4

R

R

14

3

3

R IR

15

3

4

R IM

16

3

3

IR IM

17

3

4

ADCX dst, src dst  dst + src + C ER ER

18

****0* 4

3

ER IM

19

4

3

ADD dst, src dst  dst + src

r

r

02

****0* 2

3

r

Ir

03

2

4

R

R

04

3

3

R IR

05

3

4

R IM

06

3

3

IR IM

07

3

4

ADDX dst, src dst  dst + src

ER ER

08

****0* 4

3

ER IM

09

4

3

Note: Flags Notation:

* = Value is a function of the result of the operation.

– = Unaffected.

X = Undefined.

0 = Reset to 0.

1 = Set to 1.

PS022827-1212

PRELIMINARY

eZ8 CPU Instruction Summary

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